ERA*: Enhanced Relaxed A* algorithm for Solving the Shortest Path Problem in Regular Grid Maps

This paper introduces a novel algorithm for solving the point-to-point shortest path problem in a static regular 8-neighbor connectivity (G8) grid. This algorithm can be seen as a generalization of Hadlock algorithm to G8 grids, and is shown to be theoretically equivalent to the relaxed $A^*$ ($RA^*$) algorithm in terms of the provided solution's path length, but with substantial time and memory savings, due to a completely different computation strategy, based on defining a set of lookup matrices. Through an experimental study on grid maps of various types and sizes (1290 runs on 43 maps), it is proven to be 2.25 times faster than $RA^*$ and 17 times faster than the original $A^*$, in average. Moreover, it is more memory-efficient, since it does not need to store a G score matrix

Identifying Worst-Case Test Vectors for Delay Failures Induced by Total Dose in Flash- based FPGA

A thesis presented on the effects of space radiation on the flash-based FPGA leading to failure with applying a proposed fault model to identify the worst, nominal and best-case test vectors for each. This thesis analyzed the delay failure induced in a flash-based field programmable gate array (FPGA) by a total-ionizing dose. It then identified the different factors contributing to the amount of delay induced by the total dose in the FPGA. A novel fault model for delay failure in FPGA was developed. This fault model was used to identify worst-case test vectors for delay failures induced in FPGA devices exposed to a total ionizing dose. The fault model and the methodology for identifying worst-case test vectors WCTV were validated using Micro-semi ProASIC3 FPGA and Cobalt 60 radiation facility

Video Data Visualization System: Semantic Classification And Personalization

We present in this paper an intelligent video data visualization tool, based on semantic classification, for retrieving and exploring a large scale corpus of videos. Our work is based on semantic classification resulting from semantic analysis of video. The obtained classes will be projected in the visualization space. The graph is represented by nodes and edges, the nodes are the keyframes of video documents and the edges are the relation between documents and the classes of documents. Finally, we construct the user's profile, based on the interaction with the system, to render the system more adequate to its references.Comment: graphic

Adaptation and implementation of a process of innovation and design within a SME

A design process is a sequence of design phases, starting with the design requirement and leading to a definition of one or several system architectures. For every design phase, various support tools and resolution methods are proposed in the literature. These tools are however very difficult to implement in an SME, which may often lack resources. In this article we propose a complete design process for new manufacturing techniques, based on creativity and knowledge re-use in searching for technical solutions. Conscious of the difficulties of appropriation in SME, for every phase of our design process we propose resolution tools which are adapted to the context of a small firm. Design knowledge has been capitalized in a knowledge base. The knowledge structuring we propose is based on functional logic and the design process too is based on the functional decomposition of the system, and integrates the simplification of the system architecture, from the early phases of the process. For this purpose, aggregation phases and embodiment are proposed and guided by heuristics

Reconfigurable three-terminal logic devices using phase-change materials

Conventional solid-state and mass storage memories (such as SRAM, DRAM and the hard disk drive HDD) are facing many technological challenges to meet the ever-increasing demand for fast, low power and cheap data storage solutions. This is compounded by the current conventional computer architectures (such as the von Neumann architecture) with separate processing and storage functionalities and hence data transfer bottlenecks and increased silicon footprint. Beyond the von Neumann computer architecture, the combination of arithmetic-logic processing and (collocally) storage circuits provide a new and promising alternative for computer systems that overcome the many limitations of current technology. However, there are many technical challenges that face the implementation of universal blocks of both logic and memory functions using conventional silicon technology (transistor-transistor logic - TTL, and complementary metal oxide semiconductors - CMOS). Phase-change materials, such as Ge2Sb2Te5 (GST), provide a potential complement or replacement to these technologies to provide both processing and, collocally, storage capability. Existing research in phase-change memory technologies focused on two-terminal non-volatile devices for different memory and logic applications due to their ability to achieve logic-resistive switching in nanosecond time scale, their scalability down to few nanometer-scale cells, and low power requirements. To perform logic functionality, current two-terminal phase-change logic devices need to be connected in series or parallel circuits, and require sequential inputs to perform the required logic function (such as NAND and NOR). In this research programme, three-terminal (3T) non-volatile phase-change memories are proposed and investigated as potential alternative logic cells with simultaneous inputs as reconfigurable, non-volatile logic devices. A vertical 3T logic device structure is proposed in this work based on existing phase-change based memory cell architecture and original concept work by Ovshinsky. A comprehensive, multi-physics finite-element model of the vertical 3T device was constructed in Comsol Multiphysics. This model solves Laplace's equation for the electric potential due to the application of voltage sources. The calculated electric potential and fields provide the Joule heating source in the device, which is used to compute the temperature distribution through solution of the heat diffusion equation, which is necessary to activate the thermally-driven phase transition process. The physically realistic and computationally efficient nucleation- growth model was numerically implemented to model the phase change and resistance change in the Ge2Sb2Te5 (GST) phase-change material in the device, which is combined with the finite- element model using the Matlab programming interface. The changes in electrical and thermal conductivities in the GST region are taken into account following the thermally activated phase transformations between the amorphous-crystalline states using effective medium theory. To determine the appropriate voltage and temperature conditions for the SET and RESET operations, and to optimise the materials and thicknesses of the thermal and heating layers in the device, comprehensive steady-state parametric simulations were carried out using the finite-element multi-physics model. Simulations of transient cycles of writing (SET) and erasing (RESET) processes using appropriate voltage pulses were then carried out on the designed vertical 3T device to study the phase transformations for practical reconfigurable logic operations. The simulations indicated excellent resistance contrast between the logic 1 and 0 states, and successfully demonstrated the feasibility of programming the logic functions of NAND and NOR gates using this 3T configuration

A new approach to maneuvring target tracking in passive multisensor environment

International audienceThis paper present a new approach to the multisensor Bearing-Only Tracking applications (BOT). Usually, a centralized data fusion scheme which involves a stacked vector of all the sensor measurements is applied using a single estimation filter which copes with the non-linear relation between the states and the measurements. The aforementioned approach is asymptotically optimal but suffers from the computational burden due to the augmented measurement vector and transmission aleas like delays generated by the bottleneck that occurs at the fusion center. Alternatively, since the Cartesian target positions can be determined by fusing at least 2 infrared sensor measurements in 2D case, one can use a local linear filter to estimate the target motion parameters, then a state fusion formula based on the Likelihood of the expected overall local measurements is applied to obtain the global estimate. The simulation results show that the proposed approach performance is equivalent to the centralized fusion schema in terms of tracking accuracy but exhibits the advantages of the decentralized fusion schema like parallel processing architecture and robustness against transmission delays. In addition, the low complexity of the obtained algorithm is well suited for real-time applications

A new approach in distributed multisensor tracking systems based on Kalman filter methods

International audienceIn multisensor tracking systems, the state fusion also known as track to track fusion is a crucial issue where the derivation of the best track combination is obtained according to a stochastic criteria in a minimum variance sense. Recently, sub-optimal weighted combination fusion algorithms involving matrices and scalars were developed. However, hence they only depend on the initial parameters of the system motion model and noise characteristics, these techniques are not robust against erroneous measures and unstable environment. To overcome this drawbacks, this work introduces a new approach to the optimal decentralized state fusion that copes with erroneous observations and system shortcomings. The simulations results show the effectiveness of the proposed approach. Moreover, the reduced complexity of the designed algorithm is well suited for real-time implementation